JOB?DESCRIPTION:
-?Participate?ASIC?digital?verification?for?various?IP/SoC?projects;
-?Create?verification?plans?with?designers;
-?Develop?DV?architecture?and?verification?environment;
-?Verification?execution?and?sign-off;
SKILLS?MANDATORY:
-?Excellent?team?working?style;
-?Solid?IP/SoC?verification?background:
-?Mass?production?for?verified?IP/SoC
-?Master?with?2>?years?working?experiences?on?ASIC?digital?verification
-?Production?experiences?on?verification?strategies?and?testplans;
-?Familiar?with?SystemVerilog/UVM?for?testbench?creation,?debug,?reuse,?constrained-random?stimulus?and?functional?coverage;
-?Production?experiences?on?ARM?buses,?such?as?AXI/AMBA/APB?is?a?plus;
-?Familiar?with?verification?tools?;
-?Familiar?with?Linux,?csh/Python?or?any?script?languages;
-?Good?English?skills?(read?and?write).